Interesting rule of GNU make.

Dependency can be defined more than one place. It's very interesting.

        Syntax : Take you attention that there is NO command in rule.
        <target> : <dep>
       
At abve case, <dep> is ADDED to <target>'s existing dependency (NOT "replace"!!)
But, if there is COMMAND at above rule, old COMMAND is "REPLACED" (NOTE that, dependency is still ADDED).
See below examples to help understanding.
   
    < Makefile >
    all: a
        touch all0
    a
        touch a
    all: b
    b
        touch b
   
    > make
        touch a
        touch b
        touch all0
       
    ----------------------
       
    < Makefile >
    all: a
    a
        touch a
    all: b
        touch all1
    b
        touch b
   
    > make
        touch b
        touch a
        touch all1
       
    ----------------------
       
    < Makefile >
    all: a
        touch all0
    a
        touch a
    all: b
        touch all1
    b
        touch b
   
    > make
        touch b
        touch a
        touch all1
       
    # Same with above
    # That is, older command for target is replaced with newer one.